AmigaBlogs

Well I guess many Amiga enthusiasts already know about Majsta and his first worldwide FPGA accelerator for the Amiga 600 called "Vampire 600".

From reports on the support forum on amigans.net, JosDuchIt reported some troubles installing and running JAmiga. The culprit was an innocent space in the name of the driver where JAmiga was installed.

Just quickly: the MorphOS build of the first Beta is available from SourceForge:

Thanks to Thunder for the MorphOS build!

First of all...I wish all of you a really happy new year!!! Lets hope 2014 will be a lot better than 2013 in every aspect.

Hi there,

Hi everyone,

I wish you all a happy new year! Hope 2014 will be a great year for you all. Thanks for visiting my blog and stay tuned for more posts in 2014.

Cheers!

First of all:

As we come to the end of another year in Amigaland it's a time to reflect on the past 12 months and look forward to what the new year will bring.

Σε

όσους

τους αρέσει ο

ύπνος, αλλά ξυπνούν

πάντα με καλή διάθεση,

όσους χαιρετούν ακόμα με ένα φιλί,

όσους δουλεύουν πολύ, αλλά δεν ξεχνούν

Tiny update for Java developer's

On the JAmiga support forum on amigans.net I've added a little note on a developer's package available on AmiUpdate:

For those of you who might not get the significance, workbench loads a number of libraries into the extended fast memory on bootup.  As you can see in this image below, more fast memory is actually being used than the chip, onboard memory immediately after bootup.

RTC appears to be working and keeping the date and time across cold-starts.

I picked the Epson RTC-72423 which is about a $6 chip, but is obviously directly compatible with the OKI Semiconductor MSM6242B.  The design, including the battery supervisor, had never been tested — not even as a prototype… and appears to have worked the first time!

I needed to do a “setclock reset”, set the date via “Date 28-Dec-13 02:26:00″ command, and then did a “setclock save”  Subsequent setclock loads brings it back!

After looking at datasheets for the 273 latches used and 74act74 flipflop used, the worst case propagation delay is something like 12.3ns.

But my NAND gate ACT00 logic which is triggered by the same CAS signals has a lower propagation delay of between 1-9ns.

So despite a 0ns setup time, it’s possible that I’m violating the SRAM setup times during a write by dropping /CE before the addresses have stabilized into the memory.

I haven’t come up with a solution yet, but it will likely involve adding an additional gate or two to increase the propagation delay.

Lots of progress but little time to talk about it.

Here’s the fully populated card installed.  There were two issues identified so far with the PCB design.  One, the battery holder silkscreen was upside down.  The second fix involved an inverter that needed removed whenever we decided to migrates from a flip-flop(74LS74) design to a SR NAND latch made out of NAND(74LS00) gates.

The memory tests are passing at 100% now!@#

However, there is still a minor issue with how the card responds on bootup, and I’m investigating!